Invention Grant
- Patent Title: Semiconductor package and manufacturing method thereof
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Application No.: US16795523Application Date: 2020-02-19
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Publication No.: US11145633B2Publication Date: 2021-10-12
- Inventor: Wei-Yu Chen , An-Jhih Su , Li-Hsien Huang , Tien-Chung Yang , Ming-Shih Yeh
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L25/10
- IPC: H01L25/10 ; H01L23/498 ; H01L21/48 ; H01L23/31 ; H01L23/00 ; H01L21/56 ; H01L25/00

Abstract:
A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a semiconductor die an insulating encapsulation laterally covering the semiconductor die. The semiconductor die includes a semiconductor substrate, a plurality of conductive pads distributed over the semiconductor substrate, a plurality of conductive vias disposed on and electrically connected to the conductive pads, and a dielectric layer disposed over the semiconductor substrate and spaced the conductive vias apart from one another. A sidewall of the dielectric layer extends along sidewalls of the conductive vias, the conductive vias are recessed from a top surface of the dielectric layer, and a sloped surface of the dielectric layer is connected to the top surface of the dielectric layer and the sidewall of the dielectric layer.
Public/Granted literature
- US20210066263A1 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2021-03-04
Information query
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