Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
-
Application No.: US16889498Application Date: 2020-06-01
-
Publication No.: US11152338B2Publication Date: 2021-10-19
- Inventor: Zhi-Qiang Wu , Chun-Fu Cheng , Chung-Cheng Wu , Yi-Han Wang , Chia-Wen Liu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/423 ; H01L29/10 ; H01L29/775 ; H01L29/786 ; H01L21/8238 ; H01L27/092 ; H01L25/065 ; H01L21/02 ; H01L25/04 ; H01L29/08 ; H01L29/06 ; H01L27/06 ; H01L29/40 ; H01L29/78 ; B82Y99/00 ; B82Y10/00

Abstract:
A method includes forming a stacked structure of a plurality of first semiconductor layers and a plurality of second semiconductor layers alternately stacked in a first direction over a substrate, the first semiconductor layers being thicker than the second semiconductor layers. The method also includes patterning the stacked structure into a first fin structure and a second fin structure extending along a second direction substantially perpendicular to the first direction. The method further includes removing the first semiconductor layers of the first fin structure to form a plurality of nanowires. Each of the nanowires has a first height, there is a distance between two adjacent nanowires along the vertical direction, and the distance is greater than the first height. The method includes forming a first gate structure between the second semiconductor layers of the first fin structure.
Public/Granted literature
- US20200294973A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2020-09-17
Information query
IPC分类: