Invention Grant
- Patent Title: Structures for bonding a group III-V device to a substrate by stacked conductive bumps
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Application No.: US16829267Application Date: 2020-03-25
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Publication No.: US11158593B2Publication Date: 2021-10-26
- Inventor: Jhih-Bin Chen , Chia-Shiung Tsai , Ming Chyi Liu , Eugene Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potaschnik, LLC
- Main IPC: H01L23/12
- IPC: H01L23/12 ; H01L23/48 ; H01L21/00 ; H01L21/28 ; H01L23/00 ; H01S5/183 ; H01S5/343 ; H01S5/0234 ; H01S5/02355 ; H01L25/075 ; H01L33/46 ; H01L25/065

Abstract:
Various embodiments of the present application are directed towards a method for forming an integrated chip in which a group III-V device is bonded to a substrate, as well as the resulting integrated chip. In some embodiments, the method includes: forming a chip including an epitaxial stack, a metal structure on the epitaxial stack, and a diffusion layer between the metal structure and the epitaxial stack; bonding the chip to a substrate so the metal structure is between the substrate and the epitaxial stack; and performing an etch into the epitaxial stack to form a mesa structure with sidewalls spaced from sidewalls of the diffusion layer. The metal structure may, for example, be a metal bump patterned before the bonding or may, for example, be a metal layer that is on an etch stop layer and that protrudes through the etch stop layer to the diffusion layer.
Public/Granted literature
- US20200227369A1 STRUCTURES FOR BONDING A GROUP III-V DEVICE TO A SUBSTRATE BY STACKED CONDUCTIVE BUMPS Public/Granted day:2020-07-16
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