Invention Grant
- Patent Title: Multi-gate device and related methods
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Application No.: US16599972Application Date: 2019-10-11
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Publication No.: US11158728B2Publication Date: 2021-10-26
- Inventor: Cheng-Ting Chung , Ching-Wei Tsai , Kuan-Lun Cheng
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L29/66 ; H01L29/49 ; H01L29/417 ; H01L29/78 ; H01L29/161

Abstract:
Multi-gate semiconductor devices and methods for forming thereof including forming air gaps between the gate and the adjacent source/drain features. A first fin element including a plurality of silicon layers is disposed on a substrate, a first gate structure is formed over a channel region of the first fin element. An air gap is formed such that it is disposed on a sidewall of the portion of the first gate structure. An epitaxial source/drain feature abuts the air gap. A portion of the first gate structure may also be disposed between first and second layers of the plurality of silicon layers.
Public/Granted literature
- US20200381531A1 MULTI-GATE DEVICE AND RELATED METHODS Public/Granted day:2020-12-03
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