Invention Grant
- Patent Title: MOSFETs with multiple dislocation planes
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Application No.: US16388488Application Date: 2019-04-18
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Publication No.: US11158740B2Publication Date: 2021-10-26
- Inventor: Wei-Yuan Lu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/265 ; H01L21/322 ; H01L29/32 ; H01L29/66 ; H01L29/10 ; H01L21/762 ; H01L29/04 ; H01L29/08
Abstract:
A method includes forming a metal-oxide-semiconductor field-effect transistor (MOSFET). The Method includes performing an implantation to form a pre-amorphization implantation (PAI) region adjacent to a gate electrode of the MOSFET, forming a strained capping layer over the PAI region, and performing an annealing on the strained capping layer and the PAI region to form a dislocation plane. The dislocation plane is formed as a result of the annealing, with a tilt angle of the dislocation plane being smaller than about 65 degrees.
Public/Granted literature
- US20190245077A1 MOSFETs with Multiple Dislocation Planes Public/Granted day:2019-08-08
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