Invention Grant
- Patent Title: Etch stop layer removal for capacitance reduction in damascene top via integration
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Application No.: US16851167Application Date: 2020-04-17
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Publication No.: US11177166B2Publication Date: 2021-11-16
- Inventor: Christopher J. Penny , Brent Anderson , Lawrence A. Clevenger , Robert Robison , Kisik Choi , Nicholas Anthony Lanzillo
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Randall Bluestone
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/522

Abstract:
A method of forming an interconnect structure includes forming at least one second-level interconnect in a sacrificial dielectric layer that is formed on an upper surface of a sacrificial etch stop layer, and removing the sacrificial dielectric layer and the sacrificial etch stop layer while maintaining the at least one second-level interconnect so as to expose an underlying dielectric layer. The method further includes depositing a replacement dielectric layer on an upper surface of the underlying dielectric layer to embed the at least one second-level interconnect in the replacement dielectric layer. Accordingly, an interconnect structure can be formed that includes one or more first-level interconnect in a dielectric layer and one or more second-level interconnects in a replacement dielectric layer stacked on the dielectric layer. The replacement dielectric layer directly contacts the dielectric layer.
Public/Granted literature
- US20210327751A1 ETCH STOP LAYER REMOVAL FOR CAPACITANCE REDUCTION IN DAMASCENE TOP VIA INTEGRATION Public/Granted day:2021-10-21
Information query
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