- Patent Title: Clock and data recovery circuit and frequency maintaining method
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Application No.: US17103895Application Date: 2020-11-24
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Publication No.: US11177812B2Publication Date: 2021-11-16
- Inventor: Pei Wei Chen , Fang-Ren Liao , Po Huang Huang
- Applicant: Grace Connection Microelectronics Limited
- Applicant Address: TW Zhubei
- Assignee: Grace Connection Microelectronics Limited
- Current Assignee: Grace Connection Microelectronics Limited
- Current Assignee Address: TW Zhubei
- Agent Anna Tsang
- Priority: TW108142346 20191121
- Main IPC: H03D3/24
- IPC: H03D3/24 ; H03L7/08 ; H03L7/099 ; H03L7/089

Abstract:
When digital input data disappear temporarily, within a counting period of the counter and pulse generator, an output voltage of the voltage generator rises, a threshold detector compares the output voltage of the voltage generator with a plurality of threshold values to generate a plurality of comparison results, and a logic gate unit generates a control signal according to the comparison results, to a charge pump, so that the charge pump controls the voltage-controlled oscillator to accelerate or decelerate.
Public/Granted literature
- US20210328592A1 CLOCK AND DATA RECOVERY CIRCUIT AND FREQUENCY MAINTAINING METHOD Public/Granted day:2021-10-21
Information query
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