Invention Grant
- Patent Title: Solid-state image-capturing element and having floating diffusion and hollow regions
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Application No.: US17015291Application Date: 2020-09-09
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Publication No.: US11183528B2Publication Date: 2021-11-23
- Inventor: Yusuke Tanaka , Takashi Nagano , Toshifumi Wakano , Takeshi Matsunuma
- Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Applicant Address: JP Kanagawa
- Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Current Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Current Assignee Address: JP Kanagawa
- Agency: Chip Law Group
- Priority: JP2015-071024 20150331,JP2015-200339 20151008
- Main IPC: H01L27/14
- IPC: H01L27/14 ; H01L27/10 ; H01L29/78 ; H01L29/49 ; H01L29/06 ; H01L27/146 ; H04N5/359 ; H04N5/369 ; H04N5/378 ; H04N5/374 ; H01L27/108

Abstract:
The present disclosure relates to a solid-state image-capturing element and an electronic device capable of reducing the capacitance by using a hollow region. At least a part of a region between an FD wiring connected to a floating diffusion and a wiring other than the FD wiring is a hollow region. The present disclosure can be applied to a CMOS image sensor having, for example, a floating diffusion, a transfer transistor, an amplifying transistor, a selection transistor, a reset transistor, and a photodiode.
Information query
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