Invention Grant
- Patent Title: Nanosheet transistor having partially self-limiting bottom isolation extending into the substrate and under the source/drain and gate regions
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Application No.: US16785899Application Date: 2020-02-10
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Publication No.: US11183558B2Publication Date: 2021-11-23
- Inventor: Chun-Chen Yeh , Veeraraghavan Basker , Alexander Reznicek , Junli Wang
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Randall Bluestone
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L21/02 ; H01L21/762 ; H01L29/423 ; H01L29/66 ; H01L29/786

Abstract:
Embodiments of the invention are directed to a method of performing fabrication operations to form a nanosheet field effect transistor (FET) device. The fabrication operations include forming a nanosheet stack over a portion of a substrate. A first source or drain (S/D) trench is formed adjacent to a first end of the nanosheet stack. A second S/D trench is formed adjacent to a second end of the nanosheet stack. A region of the substrate is removed to form a bottom dielectric isolation (BDI) cavity in the substrate, wherein the BDI cavity is positioned beneath at least the nanosheet stack, the first S/D trench, and the second S/D trench. The BDI cavity is filled with a dielectric material, thereby forming a BDI region positioned beneath at least the nanosheet stack, the first S/D trench, and the second S/D trench.
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