Invention Grant
- Patent Title: Semiconductor devices including hyper-abrupt junction region including spaced-apart superlattices and related methods
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Application No.: US16513825Application Date: 2019-07-17
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Publication No.: US11183565B2Publication Date: 2021-11-23
- Inventor: Richard Burton , Marek Hytha , Robert J. Mears
- Applicant: ATOMERA INCORPORATED
- Applicant Address: US CA Los Gatos
- Assignee: ATOMERA INCORPORATED
- Current Assignee: ATOMERA INCORPORATED
- Current Assignee Address: US CA Los Gatos
- Agency: Allen, Dyer, Doppelt + Gilchrist, P.A.
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L31/00 ; H01L29/15 ; H01L29/16 ; H01L29/80 ; H01L29/66 ; H01L29/93 ; H01L29/78

Abstract:
A semiconductor device may include a substrate and a hyper-abrupt junction region carried by the substrate. The hyper-abrupt region may include a first semiconductor layer having a first conductivity type, a first superlattice layer on the first semiconductor layer, a second semiconductor layer on the first superlattice layer and having a second conductivity type different than the first conductivity type, and a second superlattice layer on the second semiconductor layer. The semiconductor device may further include a gate dielectric layer on the second superlattice layer of the hyper-abrupt junction region, a gate electrode on the gate dielectric layer, and spaced apart source and drain regions adjacent the hyper-abrupt junction region.
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