Invention Grant
- Patent Title: Method for producing pillar-shaped semiconductor device
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Application No.: US16705665Application Date: 2019-12-06
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Publication No.: US11183582B2Publication Date: 2021-11-23
- Inventor: Fujio Masuoka , Nozomu Harada
- Applicant: Unisantis Electronics Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: Unisantis Electronics Singapore Pte. Ltd.
- Current Assignee: Unisantis Electronics Singapore Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Crowell & Moring LLP
- Priority: WOPCT/JP2015/085469 20151218
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/66 ; H01L29/423 ; H01L21/225 ; H01L21/308 ; H01L29/40 ; H01L29/78 ; H01L21/8238 ; H01L29/786 ; H01L29/417 ; H01L27/092

Abstract:
The method for producing a pillar-shaped semiconductor device includes a step of providing a structure that includes, on an i layer substrate, a Si pillar and an impurity region located in a lower portion of the Si pillar and serving as a source or a drain, a step of forming a SiO2 layer that extends in a horizontal direction and is connected to an entire periphery of the impurity region in plan view, a step of forming a SiO2 layer on the SiO2 layer such that the SiO2 layer surrounds the Si pillar in plan view, a step of forming a resist layer that is partly connected to the SiO2 layer in plan view, and a step of forming a SiO2 layer by etching the SiO2 layer below the SiO2 layer and the resist layer using the SiO2 layer and the resist layer as masks.
Information query
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