Invention Grant
- Patent Title: Semiconductor device and manufacturing method therefor
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Application No.: US16859295Application Date: 2020-04-27
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Publication No.: US11183589B2Publication Date: 2021-11-23
- Inventor: Nao Nagata
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JPJP2017-236455 20171208
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/739 ; H01L29/06 ; H01L29/10 ; H01L29/40 ; H01L29/08 ; H01L29/417

Abstract:
To enhance the performance of a semiconductor device. Gate electrodes extending in a Y direction and applied with a gate potential, and emitter regions and base regions both applied with an emitter potential are formed in an active cell area. The plural emitter regions are formed so as to be separated from each other in the Y direction by the base regions. A plurality of hole discharge cell areas having a ring-shaped gate electrode applied with an emitter potential are formed within an inactive cell area. The hole discharge cell areas are arranged to be separated from each other along the Y direction. Thus, an input capacitance of an IGBT is reduced, and a switching loss at turn on of the IGBT is improved.
Public/Granted literature
- US20200259005A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR Public/Granted day:2020-08-13
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