Invention Grant
- Patent Title: Method for alignment, process tool and method for wafer-level alignment
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Application No.: US16829248Application Date: 2020-03-25
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Publication No.: US11189515B2Publication Date: 2021-11-30
- Inventor: Ching-Hung Wang , Ping-Yin Liu , Yeong-Jyh Lin , Yeur-Luen Tu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L21/68
- IPC: H01L21/68 ; G01B11/14 ; H01L23/544 ; H01L23/00

Abstract:
Various embodiments of the present application are directed towards a method for workpiece-level alignment with low alignment error and high throughput. In some embodiments, the method comprises aligning a first alignment mark on a first workpiece to a field of view (FOV) of an imaging device based on feedback from the imaging device, and further aligning a second alignment mark on a second workpiece to the first alignment mark based on feedback from the imaging device. The second workpiece is outside the FOV during the aligning of the first alignment mark. The aligning of the second alignment mark is performed without moving the first alignment mark out of the FOV. Further, the imaging device views the second alignment mark, and further views the first alignment mark through the second workpiece, during the aligning of the second alignment mark. The imaging device may, for example, perform imaging with reflected infrared radiation.
Public/Granted literature
- US20200227298A1 METHOD FOR ALIGNMENT, PROCESS TOOL AND METHOD FOR WAFER-LEVEL ALIGNMENT Public/Granted day:2020-07-16
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