Invention Grant
- Patent Title: Semiconductor structure and fabrication method thereof
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Application No.: US16439690Application Date: 2019-06-12
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Publication No.: US11189523B2Publication Date: 2021-11-30
- Inventor: Shing-Yih Shih , Mao-Ying Wang , Hung-Mo Wu
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agency: CKC & Partners Co., LLC
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/31 ; H01L23/522
Abstract:
A method of forming a semiconductor structure includes the following steps. A dielectric layer is formed over a conductive line. A photoresist layer is formed over the dielectric layer. The photoresist layer is patterned to form a mask feature and an opening is defined by the mask feature. The opening has a bottom portion and a top portion communicated to the bottom portion, and the top portion is wider than the bottom portion. The dielectric layer is etched to form a via hole in the dielectric layer using the mask feature as an etch mask, such that the via hole has a bottom portion and a tapered portion over the bottom portion. The conductive material is filled in the via hole to form a conductive via.
Information query
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