Invention Grant
- Patent Title: Apparatuses, memory devices, and electronic systems
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Application No.: US16223506Application Date: 2018-12-18
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Publication No.: US11189623B2Publication Date: 2021-11-30
- Inventor: Oscar O. Enomoto , Chin Chuan Liu , Chia Wei Tsai , Yu Jen Lin
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L27/108
- IPC: H01L27/108

Abstract:
A method of forming an apparatus comprises forming filled trenches within a semiconductive structure having a well region comprising one or more dopants, the filled trenches extending into the well region and each individually comprising a conductive gate structure and a dielectric liner intervening between the conductive gate structure and the semiconductive structure. A fluorine-doped region is formed at junctions between the well region and additional regions of the semiconductive structure overlying the well region. The additional regions of the semiconductive structure are doped with one or more additional dopants having a different conductivity type than that of the one or more dopants of the well region after forming the fluorine-doped region. The semiconductive structure is annealed after doping the additional regions thereof. Apparatuses, memory devices, and electronic systems also described.
Information query
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