Invention Grant
- Patent Title: Processing array device that performs one cycle full adder operation and bit line read/write logic features
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Application No.: US17064395Application Date: 2020-10-06
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Publication No.: US11194548B2Publication Date: 2021-12-07
- Inventor: Lee-Lean Shu , Bob Haig , Chao-Hung Chang
- Applicant: GSI Technology, Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: GSI Technology, Inc.
- Current Assignee: GSI Technology, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: DLA Piper LLP (US)
- Main IPC: G11C11/419
- IPC: G11C11/419 ; G06F7/501 ; H03K19/21 ; G11C7/10 ; G11C7/12 ; G11C7/18 ; G11C7/22
Abstract:
A processing array that performs one cycle full adder operations. The processing array may have different bit line read/write logic that permits different operations to be performed.
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