Invention Grant
- Patent Title: Integrated assemblies having void regions between digit lines and conductive structures, and methods of forming integrated assemblies
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Application No.: US16709030Application Date: 2019-12-10
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Publication No.: US11195560B2Publication Date: 2021-12-07
- Inventor: Naveen Kaushik , Fatma Arzum Simsek-Ege , Deepak Chandra Pandey
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: G11C5/06
- IPC: G11C5/06 ; H01L27/108

Abstract:
Some embodiments include an integrated assembly having a memory array, and having digit lines extending along a first direction through the memory array. Insulative spacers are along sidewalls of the digit lines. The insulative spacers extend continuously along the digit lines through the memory array. Conductive regions are laterally spaced from the digit lines by intervening regions. The conductive regions are configured as segments spaced apart from one another along the first direction. The intervening regions include regions of the insulative spacers and include void regions adjacent the regions of the insulative spacers. The void regions are configured as void-region-segments which are spaced apart from one another along the first direction by insulative structures. Storage-elements are associated with the conductive regions. Some embodiments include methods of forming integrated assemblies.
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