A static direct-access memory block for a receiving sensor, including a memory cell array, a row address decoder, a column data multiplexer, a read and write module having a read amplifier and a write driver, a control logic circuit, a data input, and a data output. The static direct-access memory block has internal memory clocking. At least one adder for adding input data coming in through the data input is integrated in the static direct-access memory block. The at least one adder is situated between the data input and the read and write module. This allows the read and write operations to be optimized and, thus, the power consumption to be decreased. A receiving sensor for a radar or lidar system, including an application-specific integrated circuit. The application-specific integrated circuit includes at least one static direct-access memory block.