Embodiments provide one write operation circuit, which includes: a serial-to-parallel conversion circuit that performs serial-to-parallel conversion on a first DBI data of a DBI port to generate a second DBI data for transfer by a DBI signal line, and that generates an input data of a data buffer module depending on the second DBI data; a data buffer module that determines whether to flip a global bus depending on the input data of the data buffer module; the DBI decoding module that decodes a global bus data according to the second DBI data, and writes the decoded data into a memory bank, where decoding includes determining whether to flip the global bus data; and a precharge module that is coupled to a precharge signal line and that sets the initial state of the global bus to high.