Invention Grant
- Patent Title: Semiconductor device with doped region adjacent isolation structure in extension region
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Application No.: US16662276Application Date: 2019-10-24
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Publication No.: US11195947B2Publication Date: 2021-12-07
- Inventor: Jagar Singh , Luigi Pantisano , Anvitha Shampur , Frank Scott Johnson , Srikanth Balaji Samavedam
- Applicant: GLOBALFOUNDRIES U.S. Inc.
- Applicant Address: US CA Santa Clara
- Assignee: GLOBALFOUNDRIES U.S. Inc.
- Current Assignee: GLOBALFOUNDRIES U.S. Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Hoffman Warnick LLC
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/8238 ; H01L29/66 ; H01L27/092 ; H01L21/761 ; H01L21/8234 ; H01L29/423 ; H01L29/06

Abstract:
A semiconductor device is disclosed including a semiconductor layer, a first well doped with dopants of a first conductivity type defined in the semiconductor layer, a second well doped with dopants of a second conductivity type different than the first conductivity type defined in the semiconductor layer adjacent the first well to define a PN junction between the first and second wells, and an isolation structure positioned in the second well. The semiconductor device also includes a first source/drain region positioned in the first well, a second source/drain region positioned in the second well adjacent a first side of the isolation structure, a doped region positioned in the second well adjacent a second side of the isolation structure, and a gate structure positioned above the semiconductor layer, wherein the gate structure vertically overlaps a portion of the doped region.
Public/Granted literature
- US20210126126A1 SEMICONDUCTOR DEVICE WITH DOPED REGION ADJACENT ISOLATION STRUCTURE IN EXTENSION REGION Public/Granted day:2021-04-29
Information query
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