Invention Grant
- Patent Title: Multi-mode standard cell logic and self-startup for battery-indifferent or pure energy harvesting systems
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Application No.: US16968339Application Date: 2019-02-08
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Publication No.: US11196422B2Publication Date: 2021-12-07
- Inventor: Longyang Lin , Saurabh Jain , Massimo Alioto
- Applicant: NATIONAL UNIVERSITY OF SINGAPORE
- Applicant Address: SG Singapore
- Assignee: NATIONAL UNIVERSITY OF SINGAPORE
- Current Assignee: NATIONAL UNIVERSITY OF SINGAPORE
- Current Assignee Address: SG Singapore
- Agency: Volpe Koenig
- Priority: SG10201801131X 20180209
- International Application: PCT/SG2019/050075 WO 20190208
- International Announcement: WO2019/156636 WO 20190815
- Main IPC: H03K19/0948
- IPC: H03K19/0948 ; H03K17/16 ; H03K19/00 ; H03K19/0185

Abstract:
A cell logic structure for a battery-indifferent or pure energy harvesting multi-mode system, a battery-indifferent or pure energy harvesting multi-mode system, a method of operating a cell logic structure for a battery-indifferent or pure energy harvesting multi-mode system, and a method of operating battery-indifferent or pure energy harvesting multi-mode system. The cell gate structure comprises a CMOS gate circuit; a header circuit coupled to the CMOS gate circuit and comprising first and second header transistors for coupling in parallel between a supply voltage and the CMOS gate circuit; and a footer circuit coupled to the CMOS gate circuit and comprising first and second footer transistors for coupling in parallel between the CMOS gate circuit and a ground voltage; wherein the header and footer circuits are configured for switching between different operation modes of the multi-mode system, the different operation modes chosen from a range from a normal mode in which feedback paths from an output of the CMOS gate circuit to the gate of the second header transistor and to the gate of the second footer transistor are substantially or fully disabled for full swing in the output voltage of the CMOS gate circuit, and a leakage suppression mode in which the feedback paths are substantially or fully enabled.
Information query
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