Invention Grant
- Patent Title: Multiplier and operation method based on 1T1R memory
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Application No.: US16971678Application Date: 2019-07-12
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Publication No.: US11200949B2Publication Date: 2021-12-14
- Inventor: Xiangshui Miao , Yi Li , Xiaodi Huang
- Applicant: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
- Applicant Address: CN Hubei
- Assignee: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
- Current Assignee: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
- Current Assignee Address: CN Hubei
- Agency: JCIP Global Inc.
- Priority: CN201811379932.6 20181119
- International Application: PCT/CN2019/095687 WO 20190712
- International Announcement: WO2020/103470 WO 20200528
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C13/00 ; G06F7/523 ; G11C7/10

Abstract:
The invention discloses a multiplier and an operation method based on 1T1R memory. The multiplier includes: a 1T1R crossbar A1, a 1T1R crossbar A2, a 1T1R crossbar A3, and a peripheral circuit. The 1T1R matrices are configured to realize operation and store result of it, and the peripheral circuit is configured to transfer data and control signals, thereby controlling the operation and storage process of the 1T1R matrices. An operation circuit is configured to respectively achieve NOR Boolean logic operations, two-bit binary multipliers, and optimization. The operation method corresponding to the operation circuit respectively completes the corresponding calculation and storage process by controlling an initialization resistance state of 1T1R devices, the size of a word line input signal, the size of a bit line input signal, and the size of a source line input signal.
Public/Granted literature
- US20210090646A1 MULTIPLIER AND OPERATION METHOD BASED ON 1T1R MEMORY Public/Granted day:2021-03-25
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