Invention Grant
- Patent Title: Wafer level integration including design/co-design, structure process, equipment stress management and thermal management
-
Application No.: US16717068Application Date: 2019-12-17
-
Publication No.: US11201138B2Publication Date: 2021-12-14
- Inventor: Bing Dang , Li-Wen Hung , John U. Knickerbocker , Jae-Woong Nah
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Fleit Intellectual Property Law
- Agent Donna Flores
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/00 ; H01L21/02 ; H01L25/00 ; H01L23/48
Abstract:
A method of manufacturing a multi-layer wafer is provided. Under bump metallization (UMB) pads are created on each of two heterogeneous wafers. A conductive means is applied above the UMB pads on at least one of the two heterogeneous wafers. The two heterogeneous wafers are low temperature bonded to adhere the UMB pads together via the conductive means. At least one stress compensating polymer layer may be applied to at least one of two heterogeneous wafers. The stress compensating polymer layer has a polymer composition of a molecular weight polymethylmethacrylate polymer at a level of 10-50% with added liquid multifunctional acrylates forming the remaining 50-90% of the polymer composition.
Information query
IPC分类:
