Invention Grant
- Patent Title: Partial-results post-silicon hardware exerciser
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Application No.: US16505744Application Date: 2019-07-09
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Publication No.: US11204859B2Publication Date: 2021-12-21
- Inventor: Tom Kolan , Alex Lvovsky , Hillel Mendelson , Vitali Sokhin
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Gassner Intellectual Property
- Main IPC: G06F11/36
- IPC: G06F11/36 ; G06F9/30 ; G06F11/263 ; G06F16/903 ; G06F12/1081 ; G06F9/38 ; G06F9/32

Abstract:
A method for testing an integrated circuit, comprising: accessing a database associated with a test template, wherein said test template is configured to test a selected function of the integrated circuit; storing, in said database, data corresponding to at least partial predicted results of one or more random instruction sequences generated based on said test template; generating, by an automated test generation tool, a random instruction sequence based on said test template; executing said instruction sequence by a hardware exerciser, in the integrated circuit; and comparing results of said instruction sequence with said at least partial predicted results, to verify a function of said integrated circuit.
Public/Granted literature
- US20210011838A1 PARTIAL-RESULTS POST-SILICON HARDWARE EXERCISER Public/Granted day:2021-01-14
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