Invention Grant
- Patent Title: Top via interconnect with self-aligned barrier layer
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Application No.: US16738529Application Date: 2020-01-09
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Publication No.: US11205591B2Publication Date: 2021-12-21
- Inventor: Kenneth Chun Kuen Cheng , Chanro Park , Koichi Motoyama , Chih-Chao Yang
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Ryan, Mason & Lewis, LLP
- Agent L. Jeffrey Kelly
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/522 ; H01L21/285

Abstract:
A method includes forming a first metallization layer on a substrate comprising a plurality of conductive lines. The method further includes forming a first dielectric layer on the substrate and between adjacent conductive lines. The method further includes forming a first via layer comprising at least one via in the first dielectric layer and exposing a top surface of at least one of the plurality of conductive lines. The method further includes depositing a first conductive material in the first via. The method further includes forming a barrier layer on a top surface of the first dielectric layer and exposing a top surface of the plurality of conductive lines and the first conductive material.
Public/Granted literature
- US20210217662A1 TOP VIA INTERCONNECT WITH SELF-ALIGNED BARRIER LAYER Public/Granted day:2021-07-15
Information query
IPC分类: