Invention Grant
- Patent Title: Integrated circuit package and method
-
Application No.: US16882191Application Date: 2020-05-22
-
Publication No.: US11211371B2Publication Date: 2021-12-28
- Inventor: Chen-Hua Yu , Wei Ling Chang , Chuei-Tang Wang , Chieh-Yen Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L25/18 ; H01L23/498 ; H01L23/48 ; H01L25/16 ; H01L23/31 ; H01L25/00 ; H01L23/00 ; H01L21/78 ; H01L21/56 ; H01L21/48

Abstract:
In an embodiment, a structure includes: a graphics processor device; a passive device coupled to the graphics processor device, the passive device being directly face-to-face bonded to the graphics processor device; a shared memory device coupled to the graphics processor device, the shared memory device being directly face-to-face bonded to the graphics processor device; a central processor device coupled to the shared memory device, the central processor device being directly back-to-back bonded to the shared memory device, the central processor device and the graphics processor device each having active devices of a smaller technology node than the shared memory device; and a redistribution structure coupled to the central processor device, the shared memory device, the passive device, and the graphics processor device.
Public/Granted literature
- US20210118859A1 Integrated Circuit Package and Method Public/Granted day:2021-04-22
Information query
IPC分类: