Invention Grant
- Patent Title: Method, device and system to protect circuitry during a burn-in process
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Application No.: US16020425Application Date: 2018-06-27
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Publication No.: US11215662B2Publication Date: 2022-01-04
- Inventor: William Lambert , Kaladhar Radhakrishnan , Michael Hill
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Essential Patents Group, LLP.
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G05F1/46

Abstract:
Techniques and mechanisms for mitigating damage to voltage regulator (VR) circuitry of a packaged device. In an embodiment, the VR circuitry comprises a circuit leg between a first node and a second node. During a burn-in process, the VR circuitry provides a regulated output voltage to a load circuit via the first node, wherein the output voltage is based on a supply voltage received via the second node. While the VR circuitry provides the regulated output voltage to the load circuit, a supply current is provided to the load circuit via a path which is independent of any leg which is between the first node and the second node. In another embodiment, an integrated circuit (IC) chip of the packaged device comprises the load circuit, and the leg further comprises an off-chip coil structure which is distinct from the IC chip.
Public/Granted literature
- US20200003829A1 METHOD, DEVICE AND SYSTEM TO PROTECT CIRCUITRY DURING A BURN-IN PROCESS Public/Granted day:2020-01-02
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