Invention Grant
- Patent Title: Aligning bumps in fan-out packaging process
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Application No.: US15966468Application Date: 2018-04-30
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Publication No.: US11217555B2Publication Date: 2022-01-04
- Inventor: Ying-Jui Huang , Chien Ling Hwang , Chih-Wei Lin , Ching-Hua Hsieh , Chung-Shi Liu , Chen-Hua Yu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/538 ; H01L21/48 ; H01L21/56 ; H01L23/31 ; H01L21/683

Abstract:
A method includes placing a first package component and a second package component over a carrier. The first conductive pillars of the first package component and second conductive pillars of the second package component face the carrier. The method further includes encapsulating the first package component and the second package component in an encapsulating material, de-bonding the first package component and the second package component from the carrier, planarizing the first conductive pillars, the second conductive pillars, and the encapsulating material, and forming redistribution lines to electrically couple to the first conductive pillars and the second conductive pillars.
Public/Granted literature
- US20190103375A1 ALIGNING BUMPS IN FAN-OUT PACKAGING PROCESS Public/Granted day:2019-04-04
Information query
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