Invention Grant
- Patent Title: Bottom electrode for semiconductor memory device
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Application No.: US16139372Application Date: 2018-09-24
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Publication No.: US11217742B2Publication Date: 2022-01-04
- Inventor: Chih-Chao Yang , Theodorus E Standaert , Daniel C Edelstein
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Jeffrey S LaBaw; Steven J Meyers; L Jeffrey Kelly
- Main IPC: H01L43/02
- IPC: H01L43/02 ; H01L43/12 ; H01L27/22

Abstract:
A structure and a method for fabricating a bottom electrode for an integrated circuit device are described. A first dielectric layer is provided over a substrate and the first dielectric layer has a recess. A bottom electrode is formed over the recess. The bottom electrode consists of a microstud layer disposed completely within the recess of the dielectric and conforming to the recess, a bottom pedestal disposed on a top surface of the microstud and a top pedestal on a top surface of the bottom pedestal. The material used for the bottom pedestal has a lower electrochemical voltage than a material used for the microstud. A conductive element of the integrated circuit device is formed on a top surface of the bottom electrode. A first portion of the bottom electrode is disposed in and conforms to the recess. A second portion of the bottom electrode and the conductive element are conical sections.
Public/Granted literature
- US20200098975A1 IMPROVED BOTTOM ELECTRODE FOR SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2020-03-26
Information query
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