An impedance matching device 1 includes multiple capacitance elements and a control unit that controls on or off of semiconductor switches. The capacitance elements and respectively include a first capacitance element group and a second capacitance element group. The control unit updates the state of the first semiconductor switch included in the first capacitance element group with a first cycle until a predetermined time period elapses during which the state of the first semiconductor switch included in the first capacitance element group is maintained while the control unit updates the states of the semiconductor switch and respectively included in the first capacitance element group and the second capacitance element group with a second cycle longer than the first cycle after the predetermined time period elapses during which the state of the first semiconductor switch included in the first capacitance element group is maintained.