Invention Grant
- Patent Title: Semiconductor device
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Application No.: US16082212Application Date: 2016-04-11
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Publication No.: US11222973B2Publication Date: 2022-01-11
- Inventor: Shiro Hino , Koji Sadamatsu , Hideyuki Hatta , Yuichi Nagahisa , Kohei Ebihara
- Applicant: Mitsubishi Electric Corporation
- Applicant Address: JP Chiyoda-ku
- Assignee: Mitsubishi Electric Corporation
- Current Assignee: Mitsubishi Electric Corporation
- Current Assignee Address: JP Chiyoda-ku
- Agency: Xsensus LLP
- International Application: PCT/JP2016/061706 WO 20160411
- International Announcement: WO2017/179102 WO 20171019
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/06 ; H01L29/12 ; H01L27/04 ; H01L27/095 ; H01L29/10 ; H01L29/16 ; H01L29/872
Abstract:
A technique is provided for effectively suppressing a forward voltage shift due to occurrence of a stacking fault. A semiconductor device relating to the present technique includes a first well region of a second conductivity type, a second well region of the second conductivity type which is so provided as to sandwich the whole of a plurality of first well regions in a plan view and has an area larger than that of each of the first well regions, a third well region of the second conductivity type which is so provided as to sandwich the second well region in a plan view and has an area larger than that of the second well region, and a dividing region of a first conductivity type provided between the second well region and the third well region, having an upper surface which is in contact with an insulator.
Public/Granted literature
- US20190181259A1 SEMICONDUCTOR DEVICE Public/Granted day:2019-06-13
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