A memory device includes a memory cell chip, a peripheral circuit chip, and a routing wire. The memory cell chip includes a memory cell array disposed on a first substrate, and a first metal pad on a first uppermost metal layer. The peripheral circuit chip includes circuit devices disposed on a second substrate, and a second metal pad on a second uppermost metal layer of the peripheral circuit chip. The memory cell chip and the peripheral circuit chip are vertically connected to each other by the first metal pad and the second metal pad in a bonding area. The routing wire is electrically connected to the peripheral circuit and is disposed in the first uppermost metal layer or the second uppermost metal layer and is disposed in a non-bonding area in which the memory cell chip and the peripheral circuit chip are not electrically connected to each other.