Invention Grant
- Patent Title: Singulation of wafer level packaging
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Application No.: US16840625Application Date: 2020-04-06
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Publication No.: US11235971B2Publication Date: 2022-02-01
- Inventor: Clayton Lee Stevenson , Frank Odell Armstrong
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Michelle F. Murray; Charles A. Brill; Frank D. Cimino
- Main IPC: B81C1/00
- IPC: B81C1/00 ; B81C99/00 ; G02B26/08

Abstract:
A method includes, before attaching a window assembly to a semiconductor wafer, the semiconductor wafer including a plurality of integrated circuits and each integrated circuit including an electrical connection pad, adhering the window assembly to a carrier fixture. The method further includes, before attaching the window assembly to the semiconductor wafer, removing portions of the window assembly to create removal areas. The method then includes attaching the window assembly to the semiconductor wafer such that the electrical connection pad of each of the plurality of integrated circuits is within a removal area and removing the carrier fixture leaving the window assembly adhered to the semiconductor wafer with the electrical connection pad exposed of each of the plurality of integrated circuits.
Public/Granted literature
- US20200231434A1 SINGULATION OF WAFER LEVEL PACKAGING Public/Granted day:2020-07-23
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