Invention Grant
- Patent Title: Handling asynchronous memory errors on kernel text
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Application No.: US16788501Application Date: 2020-02-12
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Publication No.: US11237891B2Publication Date: 2022-02-01
- Inventor: Aravinda Prasad , Mahesh Jagannath Salgaonkar
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Kelli D. Morin
- Main IPC: G06F11/07
- IPC: G06F11/07 ; G11C29/52 ; G06F21/79 ; G06F11/10

Abstract:
Embodiments of the present disclosure facilitate handling corrected memory errors on kernel text. An example computer-implemented method includes identifying a correctable error (CE) in an error memory location of a memory and a kernel function impacted by the CE. The kernel function includes a plurality of instructions including a first instruction of the kernel function at a first physical location in a first region of the memory. The first region includes the error memory location. The plurality of instruction is loaded to a second region of the memory. The loading includes storing the first instruction of the kernel function at a second physical location in the second region of the memory. The first physical location in the first region of the memory is updated to include an instruction to branch to the second physical location in the second region of the memory.
Public/Granted literature
- US20210248029A1 HANDLING ASYNCHRONOUS MEMORY ERRORS ON KERNEL TEXT Public/Granted day:2021-08-12
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