Invention Grant
- Patent Title: Packaged semiconductor devices including backside power rails and methods of forming the same
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Application No.: US16994223Application Date: 2020-08-14
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Publication No.: US11239208B2Publication Date: 2022-02-01
- Inventor: Chi-Yi Chuang , Hou-Yu Chen , Kuan-Lun Cheng
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/528 ; H01L25/00 ; H01L25/065 ; H01L29/06 ; H01L29/423 ; H01L29/45 ; H01L29/786

Abstract:
Methods for forming packaged semiconductor devices including backside power rails and packaged semiconductor devices formed by the same are disclosed. In an embodiment, a device includes a first integrated circuit device including a first transistor structure in a first device layer; a front-side interconnect structure on a front-side of the first device layer; and a backside interconnect structure on a backside of the first device layer, the backside interconnect structure including a first dielectric layer on the backside of the first device layer; and a first contact extending through the first dielectric layer to a source/drain region of the first transistor structure; and a second integrated circuit device including a second transistor structure in a second device layer; and a first interconnect structure on the second device layer, the first interconnect structure being bonded to the front-side interconnect structure by dielectric-to-dielectric and metal-to-metal bonds.
Public/Granted literature
- US20210358891A1 Packaged Semiconductor Devices Including Backside Power Rails and Methods of Forming the Same Public/Granted day:2021-11-18
Information query
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