Invention Grant
- Patent Title: Vertical transport field effect transistor structure with self-aligned top junction through early top source/drain epitaxy
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Application No.: US16743880Application Date: 2020-01-15
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Publication No.: US11239360B2Publication Date: 2022-02-01
- Inventor: Shogo Mochizuki , Brent A. Anderson , Hemanth Jagannathan , Junli Wang
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Erik Johnson
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L29/08 ; H01L21/56 ; H01L21/8234 ; H01L29/417
Abstract:
A method of forming a vertical transport field effect transistor is provided. The method includes forming a vertical fin on a substrate, and a top source/drain on the vertical fin. The method further includes thinning the vertical fin to form a thinned portion, a tapered upper portion, and a tapered lower portion from the vertical fin. The method further includes depositing a gate dielectric layer on the thinned portion, tapered upper portion, and tapered lower portion of the vertical fin, wherein the gate dielectric layer has an angled portion on each of the tapered upper portion and tapered lower portion. The method further includes depositing a work function metal layer on the gate dielectric layer.
Public/Granted literature
Information query
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