The wafer comprises a first line in a first layer of the wafer. The first line has a first terminal connected to the first line. The wafer comprises a second line in the first layer of the wafer. The second line has a second terminal connected to the second line. The second terminal has a probe connected to apply a voltage ramp. The wafer comprises a third line in the first layer of the wafer. The third line has a terminal connected to the third line.