A sampling circuit includes: a phase synchronization circuit for generating, by a phase-locked loop, an N-multiplied clock that is N times as high as the scanning frequency of a scanning position signal of a resonant scanner and is synchronized with the phase of the scanning position signal, an AD converter for AD-converting a detection signal obtained by detecting light from a sample in synchronization with the N-multiplied clock, a counter for counting the number of clocks in synchronization with the N-multiplied clock, a memory for storing a counter threshold corresponding to a desired scanning position of the resonant scanner, a comparison circuit for outputting a sampling clock in response to the counter threshold and a counter value of the counter circuit coinciding with each other, and a data processing circuit for sampling the AD-converted detection signal based on the sampling clock and generating pixel data.