HMC control device and method of CPU side and HMC side for low power mode, and power management method of HMC control device
Abstract:
Disclosed are an HMC controller and a controlling method on a CPU side and an HMC side for a low power mode, and a recording medium related thereto. The CPU side HMC controller includes a plurality of link units, each of which includes a link master for storing request packets of a CPU in a request buffer and transmitting the request packets to an HMC side HMC controller in the order that they are stored; and a link slave for storing the request packets received from the HMC side HMC controller in a response buffer and transmitting the request packets to the CPU in the order that they are stored.
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