Invention Grant
- Patent Title: Multiple pin configurations of memory devices
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Application No.: US16829890Application Date: 2020-03-25
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Publication No.: US11243896B2Publication Date: 2022-02-08
- Inventor: Junichi Sato
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Greenberg Traurig
- Main IPC: G06F13/38
- IPC: G06F13/38 ; G06F13/16
Abstract:
An apparatus configured to allow data values to be written into the plurality of memory cells of the memory device at a first speed upon connecting to a first host via a first configuration of the plurality of connectors; and allow data values to be written into the plurality of memory cells at a second speed faster than the first speed, upon connecting to a second host via a second configuration of the plurality of connectors.
Public/Granted literature
- US20210303483A1 MULTIPLE PIN CONFIGURATIONS OF MEMORY DEVICES Public/Granted day:2021-09-30
Information query
