Invention Grant
- Patent Title: Method and apparatus for analyzing semiconductor wafer
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Application No.: US16681843Application Date: 2019-11-13
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Publication No.: US11244444B2Publication Date: 2022-02-08
- Inventor: Xiao Chen , Jianye Song , Guangzhi He
- Applicant: Shanghai Huali Microelectronics Corporation
- Applicant Address: CN Shanghai
- Assignee: Shanghai Huali Microelectronics Corporation
- Current Assignee: Shanghai Huali Microelectronics Corporation
- Current Assignee Address: CN Shanghai
- Agency: Adsero IP
- Priority: CN201811636763.X 20181229
- Main IPC: G06T7/00
- IPC: G06T7/00 ; G06T19/20

Abstract:
The present invention provides a method and apparatus for analyzing a semiconductor wafer for analyzing a defect distribution pattern on a semiconductor wafer to be tested. The method comprises: obtaining a defect distribution map of the semiconductor wafer to be tested, the defect distribution map indicating a defect distribution within a surface of the semiconductor wafer to be tested; establishing a three-dimensional model to be tested according to the defect distribution map, wherein an XY plane of the three-dimensional model to be tested corresponds to the surface of the semiconductor wafer to be tested, and a Z-axis of the three-dimensional model to be tested corresponds to the number of defects in each grid unit in the XY plane.
Public/Granted literature
- US20200211168A1 METHOD AND APPARATUS FOR ANALYZING SEMICONDUCTOR WAFER Public/Granted day:2020-07-02
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