A memory device includes a controller circuit, a first stage circuit, and a second stage circuit. The controller circuit outputs a first global pre-charge control signal, a second global pre-charge control signal, and a first local pre-charge control signal. The first stage circuit pre-charges a first global match line according to the first global pre-charge control signal, and to compare search data with first data, in order to determine whether to adjust a first level of the first global match line. The second stage circuit selectively pre-charges a second global match line according to the first level and the second global pre-charge control signal, and determines whether to compare the search data with second data according to a second level of the second global match line and the first local pre-charge control signal, in order to adjust the second level.