Provided herein is a memory device and a method of operating the memory device. The memory device may include a plurality of memory cells; a peripheral circuit configured to verify a program operation on the plurality of memory cells using a first verify voltage; and a control logic configured to control the peripheral circuit to suspend the program operation in response to a suspend command and verify the program operation on the plurality of memory cells using a second verify voltage in response to a resume command input after the suspend command. The second verify voltage may have a lower voltage level than the first verify voltage.