Invention Grant
- Patent Title: Double patterning interconnect integration scheme with SAV
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Application No.: US16659717Application Date: 2019-10-22
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Publication No.: US11244860B2Publication Date: 2022-02-08
- Inventor: Shyng-Tsong Chen , Terry A. Spooner , Koichi Motoyama , Chih-Chao Yang
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent L. Jeffrey Kelly
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/522 ; H01L23/528

Abstract:
A method is presented for forming self-aligned vias by employing top level line double patterns. The method includes forming a plurality of first conductive lines within a first dielectric material, recessing one or more of the plurality of first conductive lines to define first openings, filling the first openings with a second dielectric material, and forming sacrificial blocks perpendicular to the plurality of first conductive lines. The method further includes forming vias directly underneath the sacrificial blocks, removing the sacrificial blocks, and constructing a plurality of second conductive lines such that the vias align to both the plurality of first conductive lines and the plurality of second conductive lines.
Public/Granted literature
- US20210118732A1 DOUBLE PATTERNING INTERCONNECT INTEGRATION SCHEME WITH SAV Public/Granted day:2021-04-22
Information query
IPC分类: