Invention Grant
- Patent Title: Low dimensional material device and method
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Application No.: US16932268Application Date: 2020-07-17
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Publication No.: US11244866B2Publication Date: 2022-02-08
- Inventor: Yi-Tse Hung , Chao-Ching Cheng , Tse-An Chen , Hung-Li Chiang , Lain-Jong Li , Tzu-Chiang Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L29/78 ; H01L21/306 ; H01L21/28 ; H01L29/06 ; H01L21/02 ; B82Y40/00

Abstract:
In an embodiment, a device includes: a dielectric fin on a substrate; a low-dimensional layer on the dielectric fin, the low-dimensional layer including a source/drain region and a channel region; a source/drain contact on the source/drain region; and a gate structure on the channel region adjacent the source/drain contact, the gate structure having a first width at a top of the gate structure, a second width at a middle of the gate structure, and a third width at a bottom of the gate structure, the second width being less than each of the first width and the third width.
Public/Granted literature
- US20210265501A1 Low Dimensional Material Device and Method Public/Granted day:2021-08-26
Information query
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