Invention Grant
- Patent Title: Echo cancellation circuit
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Application No.: US16993312Application Date: 2020-08-14
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Publication No.: US11245435B2Publication Date: 2022-02-08
- Inventor: Chien-Ming Wu , Chia-Lin Chang
- Applicant: REALTEK SEMICONDUCTOR CORPORATION
- Applicant Address: TW Hsinchu
- Assignee: REALTEK SEMICONDUCTOR CORPORATION
- Current Assignee: REALTEK SEMICONDUCTOR CORPORATION
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, PC
- Priority: TW108141998 20191119
- Main IPC: H04B3/20
- IPC: H04B3/20 ; H04B3/23

Abstract:
An echo cancellation circuit is coupled to a receiving circuit and a transmitting circuit of an electronic device, and the transmitting circuit includes an output transistor. The echo cancellation circuit includes first and second transistors, first and second resistor-capacitor networks (RC networks), and first and second resistors. The first transistor has a first gate, a first drain and a first source. The second transistor has a second gate, a second drain and a second source. The first drain and the second drain are coupled to the receiving circuit. The first RC network is coupled between the gate of the output transistor and the first gate. The second RC network is coupled between the first gate and the second gate. The first resistor is coupled between the first source and a reference voltage. The second resistor is coupled between the second source and the reference voltage.
Public/Granted literature
- US20210152213A1 Echo cancellation circuit Public/Granted day:2021-05-20
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