The present technology relates to an image processing apparatus, an image processing method, and a surgical system, by which a captured image can be displayed with low latency in almost real time. A DMA controller 51 of a CPU 31 divides image data, which is input via an IF card 34, by the number of GPU cards 35-1, 35-2 in a horizontal direction and allocates them. In each of the GPU cards 35-1, 35-2, the image data is subjected to time division processing in the vertical direction. With this, the use of the plurality of GPU cards 35-1, 35-2 increases the speed of processing associated with display for the image data. High-speed display is realized due to reduction in latency. The present technology is applicable to an endoscopic camera, a surgical microscope, and the like.