Invention Grant
- Patent Title: Network input/output structure of electronic device
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Application No.: US17126564Application Date: 2020-12-18
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Publication No.: US11249930B2Publication Date: 2022-02-15
- Inventor: Yen-Lung Chou
- Applicant: PORTWELL INC.
- Applicant Address: TW New Taipei
- Assignee: PORTWELL INC.
- Current Assignee: PORTWELL INC.
- Current Assignee Address: TW New Taipei
- Agency: Muncy, Geissler, Olds & Lowe, PC
- Priority: TW107211328 20180817
- Main IPC: G06F13/42
- IPC: G06F13/42 ; G06F13/38 ; G06F15/173 ; G06F13/40

Abstract:
A network input/output structure of an electronic device includes a FPGA module, a multiple of UART voltage conversion transceivers, at least one network connector and at least one detection module. Each UART voltage conversion transceiver has an input/output pin definition of a brand specification of a network device. The FPGA module uses the detection module to detect the pin definition of an external network device to confirm the brand specification of the network device and turn on a voltage conversion chip of the UART voltage conversion transceiver of the brand specification, so that the external network device can transmit network information with the electronic device automatically.
Public/Granted literature
- US20210103540A1 NETWORK INPUT/OUTPUT STRUCTURE OF ELECTRONIC DEVICE Public/Granted day:2021-04-08
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