Error correcting bits
Abstract:
A data processing apparatus is provided, which includes storage circuitry comprising a plurality of lines, each of the plurality of lines comprising a data value. Access circuitry accesses a pair of the plurality of lines at a time, the pair of the plurality of lines comprising a further data value, distinct from the data value, and a plurality of error bits to detect or correct errors in the data value in each line in the pair of the plurality of lines.
Public/Granted literature
Information query
Patent Agency Ranking
0/0