Invention Grant
- Patent Title: Apparatuses, systems, and methods for a content addressable memory cell with latch and comparator circuits
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Application No.: US16411573Application Date: 2019-05-14
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Publication No.: US11264096B2Publication Date: 2022-03-01
- Inventor: John Schreck , Dan Penney
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G11C15/04
- IPC: G11C15/04 ; G11C16/28 ; G11C11/406 ; G11C11/4074 ; G11C11/408 ; G11C11/4096 ; G11C11/419 ; G11C11/4094

Abstract:
Embodiments of the disclosure are drawn to apparatuses and methods for content addressable memory (CAM) cells. Each CAM cell may include a comparator portion which stores a bit of information. Each CAM cell may also include a comparator portion, which compares an external bit to the stored bit. A group of CAM cells may be organized into a CAM register, with each CAM cell coupled in common to a signal line. Any of the CAM cells may change a voltage on the signal line if the external bit does not match the stored bit.
Public/Granted literature
- US10930349B2 Apparatuses, systems, and methods for a content addressable memory cell with latch and comparator circuits Public/Granted day:2021-02-23
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